DocumentCode
1358961
Title
Energy dissipation in general purpose microprocessors
Author
Gonzalez, Ricardo ; Horowitz, Mark
Author_Institution
Comput. Syst. Lab., Stanford Univ., CA, USA
Volume
31
Issue
9
fYear
1996
fDate
9/1/1996 12:00:00 AM
Firstpage
1277
Lastpage
1284
Abstract
In this paper we investigate possible ways to improve the energy efficiency of a general purpose microprocessor. We show that the energy of a processor depends on its performance, so we chose the energy-delay product to compare different processors. To improve the energy-delay product we explore methods of reducing energy consumption that do not lead to performance loss (i.e. wasted energy), and explore methods to reduce delay by exploiting instruction level parallelism. We found that careful design reduced the energy dissipation by almost 25%. Pipelining can give approximately a 2× improvement in energy-delay product. Superscalar issue, however, does not improve the energy-delay product any further since the overhead required offsets the gains in performance. Further improvements will be hard to come by since a large fraction of the energy (50-80%) is dissipated in the clock network and the on-chip memories. Thus, the efficiency of processors will depend more on the technology being used and the algorithm chosen by the programmer than the micro-architecture
Keywords
integrated circuit design; microprocessor chips; parallel architectures; pipeline processing; clock network; energy dissipation; energy-delay product; general purpose microprocessors; instruction level parallelism; on-chip memories; pipelining; Clocks; Delay; Energy consumption; Energy dissipation; Energy efficiency; Microprocessors; Network-on-a-chip; Performance gain; Performance loss; Pipeline processing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.535411
Filename
535411
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