DocumentCode
1359603
Title
Time-domain macromodel for lossy VLSI interconnects
Author
Cappuccino, G. ; Cocorullo, G.
Author_Institution
Dept. of Electron. Comput. Sci. & Syst., Calabria Univ., Italy
Volume
36
Issue
14
fYear
2000
fDate
7/6/2000 12:00:00 AM
Firstpage
1207
Lastpage
1208
Abstract
A new time-domain model that enables loss effects on the input impedance of on-chip transmission lines during switching transients to be accurately taken into account is presented. The model has been specifically developed for use in conjunction with MOS macromodels to predict the electrical behaviour of matched CMOS buffers. It solves the problem of mixed frequency/time domain analysis by replacing the lines with a lumped time-varying resistor
Keywords
CMOS integrated circuits; VLSI; integrated circuit interconnections; integrated circuit modelling; time-domain analysis; transient analysis; MOS macromodels; input impedance; loss effects; lossy VLSI interconnects; lumped time-varying resistor; matched CMOS buffers; mixed frequency/time domain analysis; on-chip transmission lines; switching transients; time-domain macromodel;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20000883
Filename
852244
Link To Document