• DocumentCode
    1364095
  • Title

    ESD-Protected K-Band Low-Noise Amplifiers Using RF Junction Varactors in 65-nm CMOS

  • Author

    Tsai, Ming-Hsien ; Hsu, Shawn S H ; Hsueh, Fu-Lung ; Jou, Chewn-Pu

  • Author_Institution
    Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
  • Volume
    59
  • Issue
    12
  • fYear
    2011
  • Firstpage
    3455
  • Lastpage
    3462
  • Abstract
    This paper presents two K-band low-noise amplifiers (LNAs) in 65-nm CMOS using the proposed RF junction varactors as the ESD protection devices. The junction varactors are customized for the RF ESD applications with accurate equivalent circuit models. The experimental results demonstrate excellent second breakdown currents (It2) and high ratios of the ESD level to parasitic capacitances (VESD/CESD) . Using the dual-diode topology, the first LNA demonstrates an over 2-kV Human-Body-Model (HBM) ESD protection level with a noise figure (NF) of 2.8 dB and a peak gain of 14.3 dB at around 24 GHz under a power consumption of only 7 mW. By incorporating an RF junction varactor as the extra gate-source capacitance at the input stage as a part of the ESD network, the second LNA presents an enhanced failure current level up to 2.6 A (corresponding to an HBM ESD level of 3.9 kV), and a Charge-Device-Model (CDM) ESD level up to 10.7 A, characterized by the Very Fast Transmission Line Pulse (VFTLP) tests. The second LNA shows a NF of 3.2 dB and a power gain of 13.7 dB, also under 7 mW.
  • Keywords
    CMOS analogue integrated circuits; MMIC amplifiers; electric breakdown; electrostatic discharge; equivalent circuits; field effect MMIC; low noise amplifiers; power consumption; transmission lines; CDM; CMOS; ESD-protected K-band low-noise amplifiers; HBM; LNA; RF junction varactors; VFTLP test; breakdown currents; charge-device-model; dual-diode topology; enhanced failure current level; equivalent circuit models; frequency 24 GHz; gain 13.7 dB; gain 14.3 dB; human-body-model; noise figure; noise figure 2.8 dB; noise figure 3.2 dB; parasitic capacitances; power 7 mW; power consumption; size 65 nm; very fast transmission line pulse tests; voltage 3.9 kV; Electrostatic discharge; Integrated circuit modeling; Logic gates; Low-noise amplifiers; Radio frequency; Varactors; Charge-device-model (CDM); MOS; electrostatic discharge (ESD); junction varactor; low-noise amplifier (LNA); radio frequency (RF); transmission line pulse (TLP); very fast transmission line pulse (VFTLP);
  • fLanguage
    English
  • Journal_Title
    Microwave Theory and Techniques, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9480
  • Type

    jour

  • DOI
    10.1109/TMTT.2011.2170582
  • Filename
    6062662