A new concept of p-(n-)/p-(n) thin-film epitaxial silicon wafers for MOS ULSI´s that ensures excellent gate oxide integrity

A new concept of epitaxial silicon (Si) wafers (NC epi) in which p ^-(n^-) thin-film layers are grown on p^-(n^-) Czochralski (CZ)-Si substrates (substrate resistivity: approximately 10 Ω cm) is proposed for metal oxide semiconductor (MOS) ultra large-scale integrated circuits (ULSI´s) as a starting material. A thickness of 0.3-1 μm for the epitaxial layer (p ^-/p^- structure) is shown to be sufficient for improving the gate oxide integrity for MOS-ULSI´s. The epitaxial layer grown on Si substrate greatly reduces weak spots in the gate oxide layer by covering microdefects in the CZ-Si represented by the crystal originated particle (COP). The p^-/p^$thin-film epitaxial structure results in very controlled resistivity for the electrically active region in the device, which in turn results in a lower growth cost and higher feasibility for use in current ULSI´s. The features of NC epi in combination with proximity gettering is presented. An application of NC epi in shallow-trench isolation processes is discussed, considering the retrograde-type well-tub. The amenability of epitaxial wafers to wafer enlargement (over 300 mm) is discussed to eliminate the bad effects of COP