A 2.45GHz, 50uW wake-up receiver front-end with −88dBm sensitivity and 250kbps data rate

Author

Bryant, Carl ; Sjoland, Henrik

Author_Institution

Dept. of Electr. & Inf. Technol., Lund Univ., Lund, Sweden

fYear

2014

fDate

22-26 Sept. 2014

Firstpage

235

Lastpage

238

Abstract

This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with three-phase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behavior, it achieves a sensitivity of -88 dBm at BER of 10^-3 with a data rate of 250kbps. Operating on a 0.75V supply it has a power consumption of just 50μW. It provides a 50 Ω input match completely on-chip using a compact inductor and has an active area of just 0.07mm².

Keywords

CMOS integrated circuits; UHF integrated circuits; amplitude shift keying; frequency response; radio receivers; BER; CMOS process; bit rate 250 kbit/s; compact inductor; detector behavior; frequency 2.45 GHz; high gain amplifier chain; modulation frequency response; on-off-keying; power 50 muW; power consumption; resistance 50 ohm; size 65 nm; three-phase passive mixer; uncertain IF structure; voltage 0.75 V; wake-up receiver front-end; wireless sensor networks; Detectors; Mixers; Oscillators; Power demand; Radio frequency; Receivers; Sensitivity;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th

Conference_Location

Venice Lido

ISSN

1930-8833

Print_ISBN

978-1-4799-5694-4

Type

conf

DOI

10.1109/ESSCIRC.2014.6942065

Filename

6942065