An improved NMOS AC hot-carrier lifetime prediction algorithm based on the dominant degradation asymptote

Author

Kim, Seok Won A ; Menberu, Beniyam ; Le, Huy X P ; Jiang, Wenjie ; Chung, James E.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., MIT, Cambridge, MA, USA

Volume

44

Issue

4

fYear

1997

fDate

4/1/1997 12:00:00 AM

Firstpage

651

Lastpage

658

Abstract

This study presents a new algorithm for improved prediction of AC hot-carrier lifetime. It is based on identifying and projecting the dominant degradation asymptote. The algorithm accounts for the stress-bias dependence of the hot-carrier degradation rate and the nonlinearity of the degradation time-dependence. Detailed model parameter extraction and lifetime prediction procedures are explained, and applications of the new algorithm demonstrated. Significant differences in the predicted AC lifetimes are found between the existing and the new algorithms over a wide range of CMOS inverter design parameters, such as the input ramp rate and the load capacitance

Keywords

CMOS logic circuits; MOSFET; carrier lifetime; hot carriers; integrated circuit reliability; logic gates; semiconductor device models; CMOS inverter design parameters; NMOS AC hot-carrier lifetime; dominant degradation asymptote; hot-carrier lifetime prediction algorithm; input ramp rate; load capacitance; model parameter extraction; stress-bias dependence; Algorithm design and analysis; Capacitance; Degradation; Hot carriers; Inverters; MOS devices; Parameter extraction; Prediction algorithms; Predictive models; Semiconductor device modeling;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.563371

Filename

563371