Reliable stochastic sequential switching circuits

A procedure based upon probabilistic logics is developed for the analysis and synthesis of reliable asynchronous relay sequential switching circuits, subject to a set of statistical postulates. The reliability of a sequential circuit is measured as proportional to a logarithm of the probability of error for certain state transitions of the circuit involved. The ¿ces¿ as a unit of reliability is proposed by the author. An example of the analysis and synthesis procedure is given.