DocumentCode
1379400
Title
RT-level ITC´99 benchmarks and first ATPG results
Author
Corno, Fulvio ; Reorda, Matteo Sonza ; Squillero, Giovanni
Author_Institution
Politecnico di Torino, Italy
Volume
17
Issue
3
fYear
2000
Firstpage
44
Lastpage
53
Abstract
New design flows require reducing work at the gate level and performing most activities before the synthesis step, including evaluation of testability of circuits. We propose a suite of RT-level benchmarks that help improve research in high-level ATPG tools. First results on the benchmarks obtained with our prototype tool show the feasibility of the approach
Keywords
Automatic test pattern generation; Logic testing; Performance evaluation; ATPG; ATPG tools; RT-level benchmarks; Algorithm design and analysis; Automatic test pattern generation; Automatic testing; Benchmark testing; Circuit faults; Circuit synthesis; Circuit testing; Libraries; Logic testing; Prototypes;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/54.867894
Filename
867894
Link To Document