Simulation of unstable oscillations in PWM variable-speed drives

In several recent technical papers, limit-cycle instabilities of voltage source inverter-fed drives at low speeds have been attributed to the switching effects of the inverter or slight jitter in the output waveform of a proprietary LSI pulsewidth-modulated device. A study of such limit-cycle instabilities using two simulation techniques is presented. One is full simulation including the effects of inverter harmonics, anti-overlap delays, open-circuit voltages and output waveform jitter, the other is a reduced-order simulation that neglects inverter output harmonics and other output waveform defects. These simulations form part of a commercial software package under development. The simulation results indicate that the instabilities are inherent in the inverter source impedance/induction motor combination and are relatively independent of inverter output waveform harmonics, jitter, and other defects