Electromagnetic delay networks for digital storage

Electromagnetic delay systems are very attractive for digit pattern storage in electronic computing equipment. No transducers are required, so that the efficiency can be made high, and only familiar components are used. It is well known, however, that neither the continuously-wound nor the lumped-constant type of conventional delay line can be made to give sufficient resolution to store more than perhaps 15 digits without great difficulty. A method of design for lattice-type delay networks is described, depending on the Fourier transform of the required pulse response, which enables a network to be designed with an output of the optimum form. A valve is used for inversion so that a minimum number of components is required and both input and output are single-ended, thus overcoming the usual disadvantages of the lattice arrangement. A practical design is outlined for a network with a delay of 54 microsec and sufficient resolution to enable 27 digits to be stored at a digit frequency of 500kc/s. This employs no more than 36 inductances and gives an output of about 30 volts for an input current pulse of 6 mA. A similar arrangement has been made to store 40 digits, and there is no reason to believe this to be the ultimate limit although further increase would probably be uneconomic.