Short-cut multiplication and division in automatic binary digital computers, with special reference to a new multiplication process

The paper considers the application of analogues of the well-known decimal short-cut multiplication and division methods, to the control of such operations in automatic binary digital computers. After demonstrating that the simple binary short-cut process leads, on the average, to a slowing down of multiplication, the paper developes a new process, termed the modified-short-cut (m.s.c.) process. This is defined in terms of symbolic equations and is shown to reduce the average number of additions or subtractions required during the execution of a multiplication by more than 17% to some m/3 (for an m-bit number), the maximum number by nearly 50% to (m+2)/2 and the average number of shifts by 30%. Following a discussion of the properties of the process, and, in particular, its application to signed multiplication, comparisons are made between the relative average multiplication times of a number of alternative systems including those using circuits based on `carry¿ storage or on carry-propagation-detection circuits, or on both. Brief consideration is then given to some aspects of division in automatic binary machines. The discussion is confined to a consideration of what are believed to be ideas not previously published. It is shown, in particular, that short-cut procedures can be easily and cheaply incorporated in machines using either restoring or non-restoring division techniques.