Low-temperature annealing of arsenic/phosphorus junctions

Author

Law, Mark E. ; Pfiester, James R.

Author_Institution

Dept. of Electr. Eng., Florida Univ., Gainesville, FL, USA

Volume

38

Issue

2

fYear

1991

fDate

2/1/1991 12:00:00 AM

Firstpage

278

Lastpage

284

Abstract

A model for damage enhancement that is suitable for two-dimensional simulation is proposed. The formation of arsenic and phosphorus junctions is an important process step in modern device fabrication. The accurate prediction of the vertical and lateral profile is crucial for optimization of the device behavior and reliability. Experimental data show that the damage from implantation of the dopant species has an important and controlling effect on the final profile during low-temperature annealing. Modeling of the dopant and point defect interaction during this anneal indicates that the junction is determined by the number of point defects created during the implantation. Calibration is performed by using one-dimensional experimental work on both boron and arsenic/phosphorus junctions. Two-dimensional calculations are performed and compared to experimental device data

Keywords

annealing; arsenic; doping profiles; elemental semiconductors; impurity-defect interactions; ion implantation; phosphorus; semiconductor doping; semiconductor junctions; silicon; As doping; MOSFET; P doping; SUPREM-IV; Si:P-Si:As; calibration; damage enhancement model; device behaviour optimisation; dopant modelling; ion implantation; lateral profile; low-temperature annealing; point defect interaction; reliability; two-dimensional simulation; vertical profile; Annealing; Boron; Equations; Fabrication; Helium; Impurities; MOSFET circuits; Predictive models; Semiconductor process modeling; Temperature;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.69906

Filename

69906