DocumentCode
1401117
Title
SimPL: An Effective Placement Algorithm
Author
Kim, Myung-Chul ; Lee, Dong-Jin ; Markov, Igor L.
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA
Volume
31
Issue
1
fYear
2012
Firstpage
50
Lastpage
60
Abstract
We propose a self-contained, flat, quadratic global placer that is simpler than existing placers and easier to integrate into timing-closure flows. It maintains lower-bound and upper-bound placements that converge to a final solution. The upper-bound placement is produced by a novel look-ahead legalization algorithm. Our placer SimPL outperforms mPL6, FastPlace3, NTUPlace3, APlace2, and Capo simultaneously in runtime and solution quality, running 7.10 times faster than mPL6 (when using a single thread) and reducing wirelength by 3% on the ISPD 2005 benchmark suite. More significant improvements are achieved on larger benchmarks. The new algorithm is amenable to parallelism, and we report empirical studies with SSE2 instructions and up to eight parallel threads.
Keywords
computational complexity; multiprocessing systems; ISPD 2005 benchmark suite; SimPL; look-ahead legalization algorithm; lower-bound placement; placement algorithm; self-contained flat quadratic global placer; timing-closure flows; upper-bound placement; Algorithm design and analysis; Benchmark testing; Convergence; Integrated circuit interconnections; Optimization; Parallel processing; Partitioning algorithms; Algorithms; layout; multicore; optimization; physical design; placement;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2011.2170567
Filename
6106735
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