Titanium silicide interconnect technology for submicrometer DRAMs

A self-aligned titanium silicide interconnect structure, in which the silicide wire on the isolation oxide is connected with the silicided diffusion layer directly without any contact holes, is discussed. The interconnection is fabricated by using the simultaneous reaction of Ti with the patterned amorphous Si and single-crystalline Si substrate through Si⁺ ion-beam interface mixing, rapid thermal annealing at 625°C, and subsequent furnace annealing at 900°C. Here, the physical cross section of the interconnection is clarified and the properties of titanium silicide obtained by this technology are discussed. As an application of this interconnect technology, a bit-line contact structure on a trench-type DRAM (dynamic random-access memory) cell where an Al/bit line contacts the diffusion layer through the titanium silicide pad is proposed. The effectiveness of introducing this pad in the memory cell is also discussed