DocumentCode
1405319
Title
Modified Booth pipelined multiplication
Author
Wu, A. ; Ng, C.K. ; Tang, K.C.
Author_Institution
Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong
Volume
34
Issue
12
fYear
1998
fDate
6/11/1998 12:00:00 AM
Firstpage
1179
Lastpage
1180
Abstract
A pipelined modified Booth multiplication is proposed for low power, high performance DSP application. The proposed multiplication is suitable for VLSI implementation. It has a better power-performance ratio than the traditional pipelined multiplier and modified Booth multiplier
Keywords
VLSI; VLSI; low power DSP; pipelined modified Booth multiplication; power-performance ratio;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19980884
Filename
702356
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