Alpha-particle-induced hard error mechanism in DRAMs

It has been confirmed experimentally that α-particle irradiation induces a leakage current increase at n⁺-particle junctions in a cell. The current has two modes, one due to the interface-trapped charge in the LOCOS (local oxidation of silicon) surface and the other to defects in the silicon substrate; the former is about 1.5 times larger than the latter. This phenomenon is observed using a plane, striped (4-μm width and 2-μm width) N⁺-p junction diodes. The rate of current increase on the LOCOS surface is 0.32 fA/μ-h and the one in the silicon substrate is 0.22 fA/μm²-h irradiation with 90-μm Ci²⁴¹ Am. The former is influenced by the interface-trapped charge, while the latter depends on the substrate defects. From the experimental data, the error rate of a 4-Mb DRAM (dynamic random-access memory) is estimated to be less than 1 FIT in an ordinary environment. While this is negligible, further attention is necessary for scaling down DRAM storage charge size or for use in severe environments such as in atomic reactors or outer space