DocumentCode
140839
Title
Exploiting hardware transactional memory in main-memory databases
Author
Leis, V. ; Kemper, Alfons ; Neumann, Tobias
Author_Institution
Fak. fur Inf., Tech. Univ. Munchen, Garching, Germany
fYear
2014
fDate
March 31 2014-April 4 2014
Firstpage
580
Lastpage
591
Abstract
So far, transactional memory-although a promising technique-suffered from the absence of an efficient hardware implementation. The upcoming Haswell microarchitecture from Intel introduces hardware transactional memory (HTM) in mainstream CPUs. HTM allows for efficient concurrent, atomic operations, which is also highly desirable in the context of databases. On the other hand HTM has several limitations that, in general, prevent a one-to-one mapping of database transactions to HTM transactions. In this work we devise several building blocks that can be used to exploit HTM in main-memory databases. We show that HTM allows to achieve nearly lock-free processing of database transactions by carefully controlling the data layout and the access patterns. The HTM component is used for detecting the (infrequent) conflicts, which allows for an optimistic, and thus very low-overhead execution of concurrent transactions.
Keywords
storage management; transaction processing; HTM; Haswell microarchitecture; Intel; access patterns; atomic operations; concurrent transactions; data layout; database context; database transactions; hardware transactional memory; main-memory databases; one-to-one database mapping; Concurrent computing; Databases; Hardware; Multicore processing; Parallel processing; Protocols; Synchronization;
fLanguage
English
Publisher
ieee
Conference_Titel
Data Engineering (ICDE), 2014 IEEE 30th International Conference on
Conference_Location
Chicago, IL
Type
conf
DOI
10.1109/ICDE.2014.6816683
Filename
6816683
Link To Document