DocumentCode
1411835
Title
Radix-4 multiplier with regular layout structure
Author
Park, Bongil ; Shin, Myoungcheol ; Park, In-Cheol ; Kyung, Chong-Min
Author_Institution
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Volume
34
Issue
15
fYear
1998
fDate
7/23/1998 12:00:00 AM
Firstpage
1446
Lastpage
1447
Abstract
A new parallel multiplier with a regular layout structure is described. To achieve a regular structure without sacrificing performance, a new circuit called the weighted carry save adder is proposed, which enables the multiplier not only to have a very regular layout but also to have a smaller operating size at the final adding stage than that of conventional schemes
Keywords
CMOS logic circuits; carry logic; integrated circuit layout; multiplying circuits; parallel processing; parallel multiplier; radix-4 multiplier; regular layout structure; weighted carry save adder;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19981068
Filename
706208
Link To Document