Walk-time techniques: catalyst for architectural change

Author

Fisher, Joseph A.

Author_Institution

Hewlett-Packard Labs., Cambridge, MA, USA

Volume

30

Issue

9

fYear

1997

fDate

9/1/1997 12:00:00 AM

Firstpage

40

Lastpage

42

Abstract

A quantum leap in a compiler´s ability to automatically extract parallelism from code would have enormous ramifications for future architectures, although the issue of compatibility with legacy software also hinders architectural innovation. The author describes walk-time techniques-translation techniques that change code after it is distributed. He contends that these techniques will lead to families of very different, yet surprisingly compatible CPUs that are customized to specific application areas

Keywords

application specific integrated circuits; microprocessor chips; parallel architectures; parallelising compilers; software maintenance; ASIC; architectural innovation; automatic parallelism extraction; code distribution; code translation techniques; compatible CPUs; compiler; computer architecture; customized CPUs; legacy software compatibility; walk-time techniques; Application software; Clothing industry; Companies; Computer architecture; Costs; Hardware; Instruction sets; Manufacturing automation; Parallel processing; Silicon;

fLanguage

English

Journal_Title

Computer

Publisher

ieee

ISSN

0018-9162

Type

jour

DOI

10.1109/2.612246

Filename

612246