DocumentCode
141808
Title
A HomePlugAV SoC in 40nm CMOS technology
Author
Findlater, Keith ; Bofill, Adria ; Reves, Xavier ; Abad, Jose
Author_Institution
Broadcom Eur. Ltd., Edinburgh, UK
fYear
2014
fDate
15-17 Sept. 2014
Firstpage
1
Lastpage
8
Abstract
A cost-optimized 40nm CMOS integrated powerline communications SoC is presented. This SoC includes all the analog and digital components required for the HomePlugAV standard. Circuit techniques for the RXPGA and TX line driver are described. The powerline SoC can achieve full HPAV 200Mbps PHY rate and operates with a 96dB channel dynamic range with low external component cost.
Keywords
CMOS integrated circuits; carrier transmission on power lines; driver circuits; system-on-chip; CMOS technology; HomePlugAV SoC; HomePlugAV standard; PHY rate; RXPGA; TX line driver; analog components; bit rate 200 Mbit/s; cost-optimized CMOS integrated powerline communications; digital components; size 40 nm; Attenuation; Impedance; Noise; OFDM; Receivers; Standards; System-on-chip; PGA; Powerline communication; line driver; system-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the
Conference_Location
San Jose, CA
Type
conf
DOI
10.1109/CICC.2014.6945982
Filename
6945982
Link To Document