A test circuit based on a ring oscillator array for statistical characterization of Plasma-Induced Damage

Author

Won Ho Choi ; Satapathy, Saroj ; Keane, John ; Kim, Chul Han

Author_Institution

Univ. of Minnesota, Minneapolis, MN, USA

fYear

2014

fDate

15-17 Sept. 2014

Firstpage

1

Lastpage

4

Abstract

We propose a test circuit for characterizing Plasma-Induced Damage (PID) based on a ring oscillator array for collecting high-quality BTI statistics. Two types of ring oscillators, PID protected and PID damaged, with built-in antenna structures were designed to separate PID from other effects. A beat frequency (BF) detection scheme was adopted to achieve high frequency measurement precision (>0.01%) in a short measurement time (>1μs) to prevent unwanted BTI recovery. The proposed circuit enables accurate PID-induced BTI lifetime prediction with different Antenna Ratios (ARs) in any type of device with any topology of antenna structure under any fabrication process. Measured frequency statistics from a 65nm test chip shows a 1.15% shift in the average frequency as a result of PID.

Keywords

CMOS integrated circuits; circuit reliability; integrated circuit testing; negative bias temperature instability; oscillators; plasma materials processing; statistical analysis; PID damaged; PID protected; PID-induced BTI lifetime prediction; antenna ratios; beat frequency detection scheme; built-in antenna structures; high frequency measurement precision; high-quality BTI statistics; plasma-induced damage; ring oscillator array; size 65 nm; test circuit; unwanted BTI recovery; Antenna measurements; Antennas; Degradation; Frequency measurement; Semiconductor device measurement; Stress; Voltage measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2014 IEEE Proceedings of the

Conference_Location

San Jose, CA

Type

conf

DOI

10.1109/CICC.2014.6945996

Filename

6945996