DocumentCode
1421576
Title
A Graphics Parallel Memory Organization Exploiting Request Correlations
Author
Lentaris, George ; Reisis, Dionysios
Author_Institution
Dept. of Phys., Univ. of Athens, Athens, Greece
Volume
59
Issue
6
fYear
2010
fDate
6/1/2010 12:00:00 AM
Firstpage
762
Lastpage
775
Abstract
Real-time graphics applications require memory organizations featuring parallel pixel access and low-cost implementation. This work bases on a nonlinear skew mapping scheme and exploits the correlation between consecutive requests for pixels to design an efficient parallel memory organization. The mapping achieves parallel access, of mn pixels in various shapes, to the memory organized with mn banks. The proposed design technique combines the mapping properties and the spatial correlations among pixel requests to eliminate conflicts by spending at most one extra cycle every mn consecutive parallel pixel accesses. Consequently, the technique ensures that any pixel pattern-among these commonly used in graphics-can be accessed in a single cycle from any image location. The address computations become straightforward as the numbers of the requested pixels and the banks-apart from equal-can be powers of 2.
Keywords
computer graphics; image resolution; interleaved storage; parallel processing; 762 graphics processors; graphics parallel memory organization; image location; interleaved memories; nonlinear skew mapping scheme; parallel pixel access; parallel processing; request correlations; storage devices; Algorithm design and analysis; Bibliographies; Circuits; Costs; Graphics; Organizing; Parallel algorithms; Parallel processing; Pixel; Routing; Shape; Parallel processing; graphics processors; interleaved memories.; storage devices;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2010.48
Filename
5416691
Link To Document