Study on the device characteristics of a quasi-SOI power MOSFET fabricated by reversed silicon wafer direct bonding

Author

Matsumoto, Satoshi ; Hiraoka, Yasushi ; Ishiyama, Toshihiko ; Sakai, Tatsuo ; Yachi, Toshiaki ; Yamada, Ichiro ; Ito, Akio ; Arimoto, Yoshihiro

Author_Institution

NTT Integrated Inf. & Energy Lab., Tokyo, Japan

Volume

45

Issue

9

fYear

1998

fDate

9/1/1998 12:00:00 AM

Firstpage

1940

Lastpage

1945

Abstract

The device characteristics of a quasi-SOI power MOSFET were investigated to obtain its optimum device structure. The oxide at the original bottom surface of the bulk power MOSFET of the quasi-SOI power MOSFET formed by reversed silicon wafer direct bonding acts as the buried oxide of the conventional SOI power MOSFET. The short channel effect of the quasi-SOI power MOSFET was larger than that in the conventional SOI power MOSFET. It was suppressed by increasing the width of the oxide in the body region, and the parasitic bipolar effect was suppressed by decreasing it. We also propose a new device structure which can suppress the short channel effect and parasitic bipolar effect of a quasi-SOI power MOSFET based on the results of these experiments

Keywords

power MOSFET; silicon-on-insulator; wafer bonding; Si; buried oxide; parasitic bipolar effect; quasi-SOI power MOSFET; reversed silicon wafer direct bonding; short channel effect; Bipolar transistors; Body regions; Indium tin oxide; Laboratories; MOSFET circuits; Numerical simulation; Power MOSFET; Silicon; Thin film devices; Wafer bonding;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.711359

Filename

711359