Bandwidth Enhancement With Low Group-Delay Variation for a 40-Gb/s Transimpedance Amplifier

Author

Kim, Joohwa ; Buckwalter, James F.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of California, La Jolla, CA, USA

Volume

57

Issue

8

fYear

2010

Firstpage

1964

Lastpage

1972

Abstract

A 40-Gb/s transimpedance amplifier (TIA) is proposed using multistage inductive-series peaking for low group-delay variation. A transimpedance limit for multistage TIAs is derived, and a bandwidth-enhancement technique using inductive-series π -networks is analyzed. A design method for low group delay constrained to 3-dB bandwidth enhancement is suggested. The TIA is implemented in a 0.13-μm CMOS process and achieves a 3-dB bandwidth of 29 GHz. The transimpedance gain is 50 dB·Ω , and the transimpedance group-delay variation is less than 16 ps over the 3-dB bandwidth. The chip occupies an area of 0.4 mm², including the pads, and consumes 45.7 mW from a 1.5-V supply. The measured TIA demonstrates a transimpedance figure of merit of 200.7 Ω/pJ.

Keywords

CMOS analogue integrated circuits; inductors; operational amplifiers; CMOS process; bandwidth 29 GHz; bandwidth enhancement; bit rate 40 Gbit/s; inductive series π network; low group delay variation; multistage inductive series peaking; power 45.7 mW; size 0.13 mum; transimpedance amplifier; voltage 1.5 V; CMOS; group-delay variation; inductive-series peaking; transimpedance amplifier (TIA);

fLanguage

English

Journal_Title

Circuits and Systems I: Regular Papers, IEEE Transactions on

Publisher

ieee

ISSN

1549-8328

Type

jour

DOI

10.1109/TCSI.2010.2041502

Filename

5419120