DocumentCode
1427861
Title
Pipelined GaAs carry lookahead adder
Author
Lopez, J.F. ; Reina, R. ; Hernandez, L. ; Tobajas, F. ; de Armas, V. ; Sarmiento, R. ; Nunez, A.
Author_Institution
Centre for Appl. Microelectron., Las Palmas Univ., Spain
Volume
34
Issue
18
fYear
1998
fDate
9/3/1998 12:00:00 AM
Firstpage
1732
Lastpage
1733
Abstract
Based on the recently introduced GaAs pseudo-dynamic latched logic, the authors present a new type of carry lookahead adder (CLA) which combines the benefits of 0.6 μm E/D MESFET technology with the above mentioned class of logic. Consideration is given to power dissipation, taking into account that for high levels of integration, techniques to reduce the power budget are essential. As a result. The design of a four bit pipelined GaAs CLA operating at 800 MHz and exhibiting less than 1.8 mW of power dissipation is presented
Keywords
III-V semiconductors; MESFET integrated circuits; adders; carry logic; field effect logic circuits; gallium arsenide; logic design; pipeline arithmetic; 0.6 micron; 2.8 mW; 800 MHz; E/D MESFET technology; GaAs; GaAs carry lookahead adder; pipelined adder design; power dissipation; pseudo-dynamic latched logic;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19981239
Filename
715352
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