Embedded system for area measurement using FPGA

Author

Torres-Monsalve, Albert F. ; Bolanos-Jojoa, J.D. ; Velasco-Medina, J.

Author_Institution

Bionanoelectronics Res. Group, Univ. del Valle, Cali, Colombia

fYear

2014

fDate

25-28 Feb. 2014

Firstpage

1

Lastpage

4

Abstract

Area measurement is intensively used in the industry to classify objects by its size. This paper presents the hardware design of an embedded system for area measurement using image processing by considering high accuracy, high reliability and minimal time processing. In this case, the hardware implementation algorithms for image processing are described using generic structural VHDL, synthesized on the FPGA EP2C70F896C6N, and verified using an image acquisition system based on the D5M camera and the DE2-70 development kit.

Keywords

area measurement; cameras; computerised instrumentation; embedded systems; field programmable gate arrays; hardware description languages; image processing; D5M camera; DE2-70 development kit; FPGA EP2C70F896C6N; area measurement; embedded system; generic structural VHDL; hardware design; hardware implementation algorithms; image acquisition system; image processing; minimal time processing; reliability; Algorithm design and analysis; Area measurement; Embedded systems; Finite impulse response filters; Hardware; Optical distortion; 2D FIR filter; Embedded system; area measurement; thresholding; video processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (LASCAS), 2014 IEEE 5th Latin American Symposium on

Conference_Location

Santiago

Print_ISBN

978-1-4799-2506-3

Type

conf

DOI

10.1109/LASCAS.2014.6820318

Filename

6820318