• DocumentCode
    1441131
  • Title

    Bulk Planar Junctionless Transistor (BPJLT): An Attractive Device Alternative for Scaling

  • Author

    Gundapaneni, Suresh ; Ganguly, Swaroop ; Kottantharayil, Anil

  • Author_Institution
    Dept. of Electr. Eng., Indian Inst. of Technol. Bombay, Mumbai, India
  • Volume
    32
  • Issue
    3
  • fYear
    2011
  • fDate
    3/1/2011 12:00:00 AM
  • Firstpage
    261
  • Lastpage
    263
  • Abstract
    We propose a novel highly scalable source-drain-junction-free field-effect transistor that we call the bulk planar junctionless transistor (BPJLT). This builds upon the idea of an isolated ultrathin highly doped device layer of which volume is fully depleted in the off-state and is around flatband in the on-state. Here, the leakage current depends on the effective device layer thickness, and we show that with well doping and/or well bias, this can be controllably made less than the physical device layer thickness in a bulk planar junction-isolated structure. We demonstrate by extensive device simulations that these additional knobs for controlling short-channel effects reduce the off-state leakage current by orders of magnitude for similar on-state currents, making the BPJLT highly scalable.
  • Keywords
    field effect transistors; leakage currents; OFF-state leakage current; ON-state leakage current; bulk planar junctionless transistor; isolated ultrathin highly doped device layer; physical device layer thickness; scaling; short-channel effects; source-drain-junction-free field-effect transistor; Doping; Junctions; Logic gates; Mathematical model; Metals; Semiconductor process modeling; Transistors; Gated resistor; junctionless transistor (JLT); scaling;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2010.2099204
  • Filename
    5706338