Cylindrical architectures for 1-D recursive digital filters: A state space approach

The paper considers the array processors´ implementation of finite impulse response digital filters that require recursive computations. The state space representation is used to obtain efficient implementation via dynamically switchable systolic arrays (cylindrical type) of 1-D direct realisation. This direct description leads to a reduction in the computation speed and the throughput rate. Two solutions are proposed to improve the array performance: the use of sparse matrices representing the filters is shown to considerably reduce the hardware complexity and the effect of feedback delays, consequently improving the throughput rate. The use of fast form algorithms of Porter-Aravena is also considered as an approach to design IIR filters via much faster cylindrical architectures