High-accuracy circuits for on-chip capacitive ratio testing and sensor readout

Author

Wang, Bo ; Kajita, Tetsuya ; Sun, Tao ; Temes, Gabor

Author_Institution

Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA

Volume

47

Issue

1

fYear

1998

fDate

2/1/1998 12:00:00 AM

Firstpage

16

Lastpage

20

Abstract

This paper presents novel CMOS switched-capacitor circuits for high-accuracy, on-chip capacitive-ratio testing and sensor readout. Using sigma-delta and correlated-double-sampling (CDS) techniques, these circuits provide accurate digitized capacitive-ratio readout. Both single-ended and fully differential circuits are presented. Simulation results show that the resolution can be as fine as 100 aF for 10 pF capacitors. Single-ended circuit and fully-differential circuits were implemented and tested. The measured standard deviation was below 20 aF when 10 pF capacitors were tested

Keywords

CMOS integrated circuits; capacitance measurement; capacitive sensors; sigma-delta modulation; switched capacitor networks; 10 pF; CMOS switched-capacitor circuits; correlated-double-sampling; differential circuits; digitized capacitive-ratio readout; on-chip capacitive ratio testing; sensor readout; sigma-delta techniques; simulation; single-ended circuits; standard deviation; Capacitance measurement; Capacitive sensors; Circuit noise; Circuit testing; Clocks; Low-frequency noise; Noise reduction; Parasitic capacitance; Switched capacitor circuits; Switching circuits;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/19.728781

Filename

728781