DocumentCode
1446668
Title
A Waveform-Dependent Phase-Noise Analysis for Edge-Combining DLL Frequency Multipliers
Author
Liao, Fang-Ren ; Lu, Shey-Shi
Author_Institution
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
60
Issue
4
fYear
2012
fDate
4/1/2012 12:00:00 AM
Firstpage
1086
Lastpage
1096
Abstract
Output phase noise for edge-combining delay-locked loops (DLLs) is derived in this study, which is obtained by decomposing the synthesized output waveform into a noise-free signal and a corresponding noise perturbation on it. The noise-free signal, which is affected by the systematic errors as the phase offset between phase detector inputs or delay mismatches among delay cells, possesses a periodic steady-state solution, and therefore leads to output spur. The noise perturbation, on the other hand, will be upconverted to the frequency-multiplied output based on this solution. A general analysis approach is provided that can be applied to the case such as the change of the frequency multiplication factor or the variation of the output duty cycle. The theory is verified by a programmable edge-combining DLL, which has been realized in a CMOS 90-nm technology. The predicted output phase noise has close agreement with simulation results, as well as the measurement data when the frequency multiplication factor changes.
Keywords
CMOS integrated circuits; delay lock loops; delays; frequency multipliers; phase detectors; phase noise; programmable circuits; CMOS technology; delay cell mismatching; frequency multiplication factor; frequency-multiplied output; general analysis approach; noise perturbation; noise-free signal; output duty cycle variation; output phase noise prediction; phase detector input; phase offset; programmable edge-combining DLL frequency multiplier; programmable edge-combining delay-locked loop frequency multiplier; size 90 nm; synthesized output waveform decomposition; systematic error; waveform-dependent phase-noise analysis; Clocks; Delay; Frequency synthesizers; Jitter; Mathematical model; Phase noise; Delay-locked loop (DLL); edge combiner; frequency multiplier; noise transfer function (NTF); periodic steady state (PSS); phase noise; spur;
fLanguage
English
Journal_Title
Microwave Theory and Techniques, IEEE Transactions on
Publisher
ieee
ISSN
0018-9480
Type
jour
DOI
10.1109/TMTT.2012.2183379
Filename
6151231
Link To Document