Spatial characterization of process variations via MOS transistor time constants in VLSI and WSI

Author

Nekili, M. ; Savaria, Y. ; Bois, G.

Author_Institution

Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada

Volume

34

Issue

1

fYear

1999

fDate

1/1/1999 12:00:00 AM

Firstpage

80

Lastpage

84

Abstract

This paper is the first large-scale experimental characterization of spatial process variations for a parameter that is directly involved in timing issues: the MOS transistor time constant. This is achieved by measuring the oscillation period of highspeed (500 MHz) CMOS ring oscillators that are implemented at different locations on individual dies and over wafers. Novel phenomena are observed, improving our understanding of how process variations affect the performance of synchronous systems, particularly in clock distribution networks. We observed four components contributing to period variations: an environment-dependent component, a process-dependent component of lower spatial frequency, a random component analogous to white noise, and a component depending on the geometry of the power-supply distribution network

Keywords

CMOS integrated circuits; MOS integrated circuits; VLSI; digital integrated circuits; high-speed integrated circuits; integrated circuit measurement; timing; wafer-scale integration; 500 MHz; MOS transistor time constants; VLSI; WSI; clock distribution networks; environment-dependent component; high-speed CMOS ring oscillators; oscillation period measurement; power-supply distribution network geometry; process variations; process-dependent component; random component; spatial characterization; synchronous systems; timing issues; Clocks; Fluctuations; Frequency measurement; Frequency synchronization; Geometry; Large-scale systems; MOSFETs; Ring oscillators; Timing; Very large scale integration;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.736658

Filename

736658