DocumentCode
1457821
Title
The effect of gate recess profile on device performance of Ga0.51In0.49P/In0.2Ga0.8As doped-channel FET´s
Author
Lu, Shey-Shi ; Meng, Chin-Chun ; Lin, Yo-Sheng ; Lan, Hai
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume
46
Issue
1
fYear
1999
fDate
1/1/1999 12:00:00 AM
Firstpage
48
Lastpage
54
Abstract
The effect of gate recess profile on device performance of Ga0.51In0.49P/In0.2Ga0.8As doped-channel FETs was studied. In the experiment, Ga0.51In 0.49P/In0.2Ga0.8As doped-channel FETs (DCFET´s) using triple-recessed gate structure were compared with devices using single-recessed and double-recessed gate structures. It is found that triple-recessed gate approach provides higher breakdown voltage (35 V) than single-recessed (16 V) and double-recessed gate (28 V) approaches. This is attributed to the larger aspect ratio in the triple-recessed gate structure. A unified method to calculate the breakdown voltages of MESFETs, HEMTs and DCFETs (or MISFETs) of any given arbitrary recessed gate profile was proposed and used to explain the experimental results
Keywords
III-V semiconductors; MISFET; Schottky gate field effect transistors; doping profiles; gallium arsenide; gallium compounds; high electron mobility transistors; indium compounds; semiconductor device breakdown; semiconductor device reliability; 16 V; 28 V; 35 V; DCFET; Ga0.51In0.49P-In0.2Ga0.8 As; HEMT; III-V semiconductors; MESFET; MISFET; aspect ratio; breakdown voltage; doped-channel FET; double-recessed gate structure; gate recess profile; single-recessed gate structure; triple-recessed gate structure; Avalanche breakdown; Breakdown voltage; Doping; Etching; FETs; Gallium arsenide; Helium; MESFETs; MISFETs; Two dimensional displays;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.737440
Filename
737440
Link To Document