Multibit resonant tunneling diode SRAM cell based on slew-rate addressing

Author

Van der Wagt, J. Paul A ; Tang, Hao ; Broekaert, Tom P E ; Seabaugh, Alan C. ; Kao, Yung-Chung

Author_Institution

Sci. Center, Rockwell Int. Corp., Thousand Oaks, CA, USA

Volume

46

Issue

1

fYear

1999

fDate

1/1/1999 12:00:00 AM

Firstpage

55

Lastpage

62

Abstract

We propose and demonstrate a resonant-tunneling diode (RTD) based memory cell in which N bits are stored in a series combination of N RTDs without internal node contacts. The slew rate of an applied voltage signal determines the circuit switching dynamics and allows addressing of the bits. We verify slew rate dependent switching order of up to four series RTDs experimentally and through SPICE simulation incorporating a physics-based RTD model. The new addressing scheme allows N bits to be stored in a stack of N vertically integrated RTDs compared to log₂ (N) bits in previous demonstrations. We demonstrate a two-bit two-RTD static memory cell based on the new method

Keywords

SPICE; SRAM chips; circuit simulation; integrated circuit modelling; multivalued logic; resonant tunnelling diodes; SPICE simulation; SRAM cell; applied voltage signal; circuit switching dynamics; multibit memory; physics-based RTD model; resonant tunneling diode; slew-rate addressing; static memory cell; Diodes; FETs; Fuzzy logic; Hysteresis; Laboratories; Random access memory; Resonant tunneling devices; SPICE; Switching circuits; Voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.737441

Filename

737441