• DocumentCode
    1458325
  • Title

    Pulsed-Latch Circuits: A New Dimension in ASIC Design

  • Author

    Shin, Youngsoo ; Paik, Seungwhun

  • Author_Institution
    KAIST, Daejeon, South Korea
  • Volume
    28
  • Issue
    6
  • fYear
    2011
  • Firstpage
    50
  • Lastpage
    57
  • Abstract
    Pulsed-latch circuits retain the advantages of both latches and flip-flops, offering higher performance and lower power consumption within a conventional ASIC design environment. This article identifies a design methodology and tools for pulsed-latch ASICs to complement this environment. The authors review potential solutions and provide quantitative results to assess the effectiveness of pulsed-latch circuits.
  • Keywords
    application specific integrated circuits; flip-flops; integrated circuit design; pulse circuits; ASIC design environment; flip-flops; pulsed-latch ASIC; pulsed-latch circuits; Application specific integrated circuits; Delay; Flip-flops; Latches; Power demand; Pulse modulation; design and test; high performance; low power; pulsed latch; pulsed-latch ASIC methodology;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2011.24
  • Filename
    5719582
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1458325