Simulation of yield/cost learning curves with Y4

Author

Nag, Pranab K. ; Maly, Wojciech ; Jacobs, Hermann J.

Author_Institution

Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA

Volume

10

Issue

2

fYear

1997

fDate

5/1/1997 12:00:00 AM

Firstpage

256

Lastpage

266

Abstract

This paper describes a prototype of a discrete event simulator-Y4 (yield forecaster)-capable of simulating defect related yield loss and manufacturing cost as a function of time, for a multiproduct IC manufacturing line. The methodology of estimating yield and cost is based on mimicking the operation and characteristics of a manufacturing line in the time domain. The paper presents a set of models that take into account the effect of particles introduced during wafer processing as well as changes in their densities due to process improvements. These models also illustrate a possible way of accounting for the primary attributes of fabrication, product, and failure analysis which affect yield learning. A spectrum of results are presented for a manufacturing scenario to demonstrate the usefulness of the simulator in formulating IC manufacturing strategies

Keywords

discrete event simulation; economics; integrated circuit manufacture; integrated circuit yield; semiconductor process modelling; Y4; discrete event simulation; failure analysis; manufacturing cost; multiproduct IC manufacturing; particle density; time domain model; wafer processing; yield forecaster; yield learning curve; Cost function; Discrete event simulation; Fabrication; Failure analysis; Predictive models; Pulp manufacturing; Semiconductor device modeling; Virtual manufacturing; Virtual prototyping; Yield estimation;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/66.572080

Filename

572080