CM_ISA++: An instruction set for dynamic task scheduling units for more than 1000 cores

In this paper a dynamic task scheduling unit for many-core systems with over 1000 cores is introduced. It is called CoreManager. It dynamically schedules thousands of tasks of several applications, allocates processing elements, controls the prefetching of data transfers, and explicitly manages the on-chip memories. For many-core systems a high task throughput and a low latency are essential for its success. Therefore, the CoreManager integrates a newly developed application-specific instruction set, called CM_ISA++, for a superior scheduling performance. The design of the instruction set of the CoreManager is presented, explained and the performance of each component is analyzed. Furthermore, the CoreManager is integrated and evaluated in a many-core system with 1008 processing elements. Our CoreManager implementation outperforms a RISC-based implementation by 193x in scheduling and 419x in processing element allocation performance. Consequently, scalability of the system as well as task throughput and latency is dramatically improved compared to RISC-based scheduling approaches.