Pulse counting and fast scaling transistor circuits

The present state of fast transistor scaling circuits is reviewed and typical designs given for: (1) a frequency divider stage for regular pulses; (2) aperiodic binary circuits for both slow and fast (100 Mc/s p.r.f.) operation; (3) modification of a 4 binary scale-of-16 to a decade scaler operating at 10 Mc/s; (4) general purpose bistable plus AND gates circuits for use in pulse data processing applications as an add and subtract binary scaler or alternatively for gating pulse timingtrains up to 8 Mc/s repetition rates. The present maximum repetitive pulse counting rates of scaler design is about 200 Mc/s but these rates may be exceeded with the use of faster transistors or tunnel diode circuits