Delay Estimation on Single-Electron Tunneling-Based Logic Gates

The switching speed of single-electron tunneling (SET) logic devices is determined by their delay which, with the stochastic nature of electron transports, is still not well understood and characterized so far. This study looks at unique SET phenomena in SET logic gates and, for the first time, presents several approaches to estimate their delay, including an exact method and two approximate methods (namely, step estimation and fast estimation). Both theoretical analysis and application are shown to support the effectiveness of the proposed method, which also allow us to further explore the impacts of device parameters on the dynamic behavior of SET logic circuits.