• DocumentCode
    1466353
  • Title

    Speeding up the PLL frequency step response by two charge pulses

  • Author

    Hakkinen, J. ; Kostamovaara, J.

  • Author_Institution
    Dept. of Electr. Eng., Oulu Univ., Finland
  • Volume
    37
  • Issue
    7
  • fYear
    2001
  • fDate
    3/29/2001 12:00:00 AM
  • Firstpage
    411
  • Lastpage
    412
  • Abstract
    A simple method is presented for speeding up the frequency step response of a PLL-based synthesizer which uses an excess output frequency to quickly cancel the accumulated phase error. In this method, current pulses are delivered to the loop filter to overdrive the PLL and later to cancel the frequency error. Experiments confirm a good agreement between measurement results and theoretical expectations
  • Keywords
    frequency response; frequency synthesizers; phase locked loops; PLL; accumulated phase error; charge pulses; excess output frequency; frequency error; frequency step response; frequency synthesizer; loop filter;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20010312
  • Filename
    917460
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1466353