DocumentCode
1467557
Title
A fully differential sample-and-hold circuit for high-speed applications
Author
Nicollini, Germano ; Confalonieri, P. ; Senderowicz, D.
Author_Institution
SGS-Thomson Microelectron., Milano, Italy
Volume
24
Issue
5
fYear
1989
fDate
10/1/1989 12:00:00 AM
Firstpage
1461
Lastpage
1465
Abstract
A new design technique for realizing a true fully differential sample-and-hold (S/H) circuit is presented. This technique avoids the reset phase and consequently the need for a high slew rate for the operational amplifier, it therefore can be used for high-speed applications. A prototype circuit, which occupies 0.1 mm2 in a 3- mu m CMOS process, is integrated and experimental results are presented.
Keywords
CMOS integrated circuits; differential amplifiers; integrated circuit technology; operational amplifiers; sample and hold circuits; 3 micron; CMOS process; S/H circuit; design technique; experimental results; fully differential sample-and-hold circuit; high-speed applications; operation; prototype circuit; Bandwidth; CMOS process; Capacitors; Circuits; Clocks; Differential amplifiers; Electrons; Frequency; Operational amplifiers; Prototypes; Signal processing; Solid state circuits; Switching circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1989.572640
Filename
572640
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