• DocumentCode
    1469034
  • Title

    Analysis of Low Dose Rate Effects on Parasitic Bipolar Structures in CMOS Processes for Mixed-Signal Integrated Circuits

  • Author

    Kruckmeyer, Kirby ; Prater, James S. ; Brown, Bill ; Trinh, Thang

  • Author_Institution
    Nat. Semicond. Corp., Santa Clara, CA, USA
  • Volume
    58
  • Issue
    3
  • fYear
    2011
  • fDate
    6/1/2011 12:00:00 AM
  • Firstpage
    1023
  • Lastpage
    1031
  • Abstract
    Many bipolar linear integrated circuits have been shown to exhibit enhanced low dose rate sensitivity (ELDRS), where a product may have worse total ionizing dose (TID) performance when exposed to ionizing radiation at a low dose rate (LDR) than when exposed at a high dose rate (HDR). Recent studies on test cells have suggested that submicron CMOS processes may also exhibit ELDRS. Some CMOS products, although not considered to be BiCMOS, do contain active bipolar elements using the parasitic bipolar structures present in all bulk CMOS processes. Three mixed-signal CMOS products, one digital-to-analog converter (DAC) and two analog-to-digital converters (ADC), using different submicron CMOS processes and using active parasitic bipolar structures were put through LDR TID testing to determine if actual products exhibit ELDRS. MIL-STD-883 TM1019 contains a test method to qualify products that fail HDR TID testing for LDR environments by using HDR testing along with a room temperature anneal. This test method was previously demonstrated on supermicron process nodes. It has been suggested that this test method is not valid for submicron processes. The test method was validated on a submicron CMOS product using the LDR test data from one of the products in this study.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; bipolar integrated circuits; digital-analogue conversion; mixed analogue-digital integrated circuits; analog-to-digital converters; bipolar linear integrated circuits; digital-to-analog converter; enhanced low dose rate sensitivity; low dose rate effects; mixed-signal integrated circuits; parasitic bipolar structures; submicron CMOS processes; total ionizing dose; Annealing; CMOS integrated circuits; CMOS process; Logic gates; Radiation effects; Testing; Transistors; Analog-to-digital converter (ADC); digital-to-analog converter (DAC); enhanced low dose rate sensitivity (ELDRS);
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2011.2116041
  • Filename
    5728894