High performance Nb Josephson devices for petaflops computing

Author

Kleinsasser, A.W.

Author_Institution

Jet Propulsion Lab., Pasadena, CA, USA

Volume

11

Issue

1

fYear

2001

fDate

3/1/2001 12:00:00 AM

Firstpage

1043

Lastpage

1049

Abstract

The Hybrid Technology Multi-Threaded (HTMT) approach to petaflops computing includes large numbers of ultra-high performance Nb Rapid Single Flux Quantum (RSFQ) processor and memory chips, making it by far the largest active superconducting electronics project in the United States. In order to achieve petaflops, RSFQ circuits with 10⁵ to 10⁶ junctions per chip will be required to operate at clock speeds of 50 to 100 GHz, far beyond the current state of the art. In this paper, we review the state of the art of Nb circuit fabrication and discuss the requirements for significantly improving circuit density and speed

Keywords

niobium; superconducting memory circuits; superconducting processor circuits; 50 to 100 GHz; Josephson device; Nb; Nb circuit fabrication; RSFQ memory chip; RSFQ processor chip; hybrid technology multi-threaded architecture; petaflops computing; superconducting electronics; Fabrication; High performance computing; High temperature superconductors; Josephson junctions; Niobium; Power dissipation; Quantum computing; Space technology; Superconducting devices; Superconducting integrated circuits;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/77.919527

Filename

919527