• DocumentCode
    1483826
  • Title

    Pseudopin assignment with crosstalk noise control

  • Author

    Chang, Chin-Chih ; Cong, Jason

  • Author_Institution
    Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
  • Volume
    20
  • Issue
    5
  • fYear
    2001
  • fDate
    5/1/2001 12:00:00 AM
  • Firstpage
    598
  • Lastpage
    611
  • Abstract
    This paper presents a new pseudopin assignment (PPA) algorithm with crosstalk noise control in multilayer gridless general-area routing. We propose a two-step approach that considers obstacles and minimizes the weighted sum of total wire length and the estimated number of vias under crosstalk noise constraints. We test our algorithms on a set of MCM examples and a set of standard-cell examples. Without crosstalk noise control in PPA, the average noise in the MCM test cases after detailed routing is 0.13-0.22 VDD with up to 11% of nets larger than 0.3 VDD. However, if the noise constraint of each net is set to 0.3 VDD in PPA, the average noise in each case reduces to 0.11-0.15 VDD (15%-31% reduction) with no crosstalk noise violations. Most of the nets in our standard-cell test cases do not have noise problems. Our PPA algorithms still give better noise distributions and have 1%-10% noise reduction on the global nets in these standard-cell test cases. Even without ripup and reroute, the detailed routing completion rate is 93%-99% and the average vias per net is only 0.7-1.4 for our MCM test cases and 1.0-1.7 for our standard-cell test cases
  • Keywords
    cellular arrays; crosstalk; integrated circuit layout; integrated circuit noise; multichip modules; network routing; MCM; crosstalk noise control; deep submicron integrated circuit design; multilayer gridless general area routing; pseudopin assignment algorithm; standard cell; via number; wire length; Bridges; Crosstalk; Heuristic algorithms; Noise reduction; Nonhomogeneous media; Routing; Semiconductor device noise; Testing; Wire; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/43.920686
  • Filename
    920686