Modeling of the synchronization process jitter spectrum with input jitter

The synchronous residual time stamp (SRTS) is one approach approved for the encoding and transporting of the continuous bit rate (CBR) service clock in ATM Adaptation Layer 1 (AAL1) allowing CBR services to be transported in ATM cells over the B ISDN. It has been shown by the authors and others that the SRTS method generates waiting time jitter analogous to that produced by other synchronization processes such as pulse stuffing synchronization. Modeling of the synchronization process as it applies to the SRTS method requires a time domain approach to produce an exact expression of the jitter. In this paper, we apply a new time domain analysis technique previously developed by the authors to derive the expressions for the jitter spectrum of the synchronization process in the presence of input jitter on the service clock. Furthermore, the particular form taken by the jitter spectrum when the input jitter is sinusoidal is also found. Experiments verifying the synchronization process jitter spectrum, both with and without sinusoidal input jitter, are reported. Confirmation is also provided that it is possible to approximate timing jitter by phase jitter as long as certain frequency-amplitude limits are observed