• DocumentCode
    1485404
  • Title

    Verilog-A Modeling of Radiation-Induced Mismatch Enhancement

  • Author

    Gorbunov, Maxim S. ; Danilov, Igor A. ; Zebrev, Gennady I. ; Osipenko, Pavel N.

  • Author_Institution
    Comput. Eng. Dept. (ORVT), Russian Acad. of Sci., Moscow, Russia
  • Volume
    58
  • Issue
    3
  • fYear
    2011
  • fDate
    6/1/2011 12:00:00 AM
  • Firstpage
    785
  • Lastpage
    792
  • Abstract
    Physical model of TID effects is embedded into BSIM3v3 model implemented using Verilog-A. Radiation-induced mismatch enhancement due to the combined action of technology variations and electrical bias difference is demonstrated by simulation. It is shown that the total ionizing dose degradation of circuit components under inequivalent electric field conditions could lead to mismatch of internal circuit parameters, which results in a change to circuit output mismatch parameters.
  • Keywords
    CMOS integrated circuits; hardware description languages; integrated circuit modelling; radiation hardening (electronics); Verilog-A modeling; circuit components; circuit output mismatch parameters; electrical bias difference; inequivalent electric field conditions; internal circuit parameters; radiation-induced mismatch enhancement; technology variations; total ionizing dose degradation; Degradation; Hardware design languages; Integrated circuit modeling; Logic gates; Radiation effects; Threshold voltage; Transistors; CMOS; SPICE; TID; Verilog-A; mismatch; simulation;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2010.2104162
  • Filename
    5740970