Effectiveness of Stressors in Aggressively Scaled FinFETs

Author

Xu, Nuo ; Ho, Byron ; Choi, Munkang ; Moroz, Victor ; Liu, Tsu-Jae King

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA

Volume

59

Issue

6

fYear

2012

fDate

6/1/2012 12:00:00 AM

Firstpage

1592

Lastpage

1598

Abstract

The stress transfer efficiency (STE) and impact of process-induced stress on carrier mobility enhancement in aggressively scaled FinFETs are studied for different stressor technologies, substrate types, and gate-stack formation processes. TCAD simulations show that strained-source/drain STE is 1.5× larger for bulk FinFETs than for SOI FinFETs. Although a gate-last process substantially enhances longitudinal stress within the channel region, it provides very little improvement in electron mobility over that achieved with a gate-first process. Guidelines for FinFET stressor technology optimization are provided, and performance enhancement trends for future technology nodes are projected.

Keywords

MOSFET; carrier mobility; SOI FinFET; TCAD simulations; aggressively scaled FinFET; bulk FinFET; carrier mobility enhancement; gate-first process; gate-last process; gate-stack formation processes; longitudinal stress enhancement; performance enhancement; strained-source-drain STE; stress transfer efficiency; stressor technology optimization; substrate types; Epitaxial growth; FinFETs; Logic gates; Performance evaluation; Silicon; Stress; Substrates; Carrier mobility; FinFET; Si:C; SiGe; contact etch-stop layer (CESL); gate first; gate last; source/drain (S/D) stressors; strain; stress transfer efficiency (STE);

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2012.2189861

Filename

6178793