DocumentCode
1493128
Title
Modeling of Stress-Retarded Thermal Oxidation of Nonplanar Silicon Structures for Realization of Nanoscale Devices
Author
Ma, Fa-Jun ; Rustagi, Subhash C. ; Samudra, Ganesh S. ; Zhao, Hui ; Singh, Navab ; Lo, Guo-Qiang ; Kwong, Dim-Lee
Author_Institution
Inst. of Microelectron., Agency for Sci., Technol. & Res. (A*STAR), Singapore, Singapore
Volume
31
Issue
7
fYear
2010
fDate
7/1/2010 12:00:00 AM
Firstpage
719
Lastpage
721
Abstract
Accurate modeling of stress-retarded orientation-dependent 2-D oxidation is carried out by matching the experimental and simulated oxide thicknesses of silicon FIN nanostructures over a wide range of temperatures and times in dry oxygen. Experimentally observed initial oxidation rate enhancement, orientation-dependent stress retardation, and self-limiting phenomena are modeled, and a new universal stress retardation parameter set is obtained for the first time. The new parameter set has been validated against oxidation experiments presented here and those reported in the literature. Furthermore, the new model is used to explore silicon nanowire shape engineering.
Keywords
nanoelectronics; nanowires; oxidation; dry oxygen; nanoscale device; nonplanar silicon structure; orientation-dependent stress retardation; oxidation rate enhancement; oxide thickness; self-limiting phenomena; silicon FIN nanostructure; silicon nanowire shape engineering; stress-retarded orientation-dependent 2D oxidation; stress-retarded thermal oxidation; universal stress retardation parameter set; 2-D oxidation; Nanowire (NW); orientation dependence; self-limiting; shape engineering; stress retardation;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2010.2047375
Filename
5466093
Link To Document