A new self-aligning process for whole-wafer tunnel junction fabrication

Author

Blamire, M.G. ; Evetts, J.E. ; Hasko, D.G.

Author_Institution

Dept. of Mater. Sci. & Metall., Cambridge Univ., UK

Volume

25

Issue

2

fYear

1989

fDate

3/1/1989 12:00:00 AM

Firstpage

1123

Lastpage

1126

Abstract

The authors have developed a processing method for whole-wafer tunnel junctions which allows the preparation of planar tunnel junctions with just two lithographic steps and largely eliminates the inherent capacitance and potential failure problems associated with overlap between the base electrode and the counterelectrode metallization common to all existing methods. The basic feature of this self-aligning whole-wafer (SAWW) process is that the pattern used to create the counterelectrode metallization also defines the junction area. Results of preliminary trials of this method are presented and possible future developments discussed

Keywords

metallisation; photolithography; sputter deposition; sputter etching; superconducting junction devices; superconductive tunnelling; Josephson effect; counterelectrode metallization; photolithography; planar tunnel junctions; self-aligning process; sputtering; superconducting junctions; tunnel junction fabrication; whole-wafer tunnel junctions; Capacitance; Electrodes; Fabrication; Insulation; Josephson junctions; Materials science and technology; Metallization; Microelectronics; Resists; Superconducting epitaxial layers;

fLanguage

English

Journal_Title

Magnetics, IEEE Transactions on

Publisher

ieee

ISSN

0018-9464

Type

jour

DOI

10.1109/20.92487

Filename

92487