• DocumentCode
    1495170
  • Title

    Robust System Design to Overcome CMOS Reliability Challenges

  • Author

    Mitra, Subhasish ; Brelsford, Kevin ; Kim, Young Moon ; Lee, Hsiao-Heng Kelin ; Li, Yanjing

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
  • Volume
    1
  • Issue
    1
  • fYear
    2011
  • fDate
    3/1/2011 12:00:00 AM
  • Firstpage
    30
  • Lastpage
    41
  • Abstract
    Today´s mainstream electronic systems typically assume that transistors and interconnects operate correctly over their useful lifetime. With enormous complexity and significantly increased vulnerability to failures compared to the past, future system designs cannot rely on such assumptions. For coming generations of silicon technologies, several causes of hardware reliability failures, largely benign in the past, are becoming significant at the system level. Robust system design is essential to ensure that future systems perform correctly despite rising complexity and increasing disturbances. This paper describes three techniques that can enable a sea change in robust system design through cost-effective tolerance and prediction of failures in hardware during system operation: 1) efficient soft error resilience; 2) circuit failure prediction; and 3) effective on-line self-test and diagnostics. The need for global optimization across multiple abstraction layers is also demonstrated.
  • Keywords
    CMOS integrated circuits; integrated circuit design; integrated circuit reliability; integrated circuit testing; CMOS reliability; abstraction layer; circuit failure prediction; electronic system; hardware reliability failure; online diagnostic; online self-testing; robust system design; silicon technology; soft error resilience; transistors; CMOS integrated circuits; Hardware; Layout; Resilience; Robustness; Transistors; Built-In Soft Error Resilience (BISER); Concurrent Autonomous chip self-test and diagnostics using Stored test Patterns (CASP); Layout design through Error-Aware transistor Positioning (LEAP); circuit failure prediction; diagnostics; on-line self-test reliability; resilience; robust system; soft error;
  • fLanguage
    English
  • Journal_Title
    Emerging and Selected Topics in Circuits and Systems, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    2156-3357
  • Type

    jour

  • DOI
    10.1109/JETCAS.2011.2135630
  • Filename
    5751208