DocumentCode
1497020
Title
I-V maps [educational circuit simulation]
Author
Darling, Robert B.
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
Volume
44
Issue
2
fYear
2001
fDate
5/1/2001 12:00:00 AM
Abstract
A graphical circuit mapping technique is introduced for purposes of visualization and instruction. The technique is oriented toward mainly planar circuits which operate from fixed power supply rail voltages, and which are typical of most integrated circuit designs. The I-V map allows a simultaneous representation of all voltages, currents and power dissipations, and can be constructed to scale, which then gives accurate magnitude information. The I-V map proves valuable to recognizing current and voltage distributions, elements of high power dissipation, and as a classroom instructional tool for Kirchhoff´s laws
Keywords
circuit simulation; computer aided instruction; current distribution; electrical engineering education; engineering graphics; equivalent circuits; voltage distribution; Kirchhoff´s laws; classroom instructional tool; current distribution; currents; educational circuit simulation; fixed power supply rail voltage operation; graphical circuit mapping technique; instruction; planar circuits; power dissipations; visualization; voltage distribution; voltages;
fLanguage
English
Journal_Title
Education, IEEE Transactions on
Publisher
ieee
ISSN
0018-9359
Type
jour
DOI
10.1109/13.925844
Filename
925844
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